SMPTE 2110-22 Sub-system IP-cores 
for JPEG XS video over RTP encapsulation    

Combining the TicoXS (& FIP) Encoder/Decoder IP-cores with RTP encapsulation


The intoPIX SMPTE 2110-22 Sub-system IP-cores (TX & RX) are combining the IPX-RTP-XS cores for JPEG XS RTP packetization / depacketization and the intoPIX JPEG XS codecs, namely the IPX-TicoXS  or the IPX-TicoXS FIP IP-cores.  This solution is ideal for implementers as it provides a fully integrated design, compliant with the JPEG-XS video transport over RTP standard, SMPTE 2110, IPMX and VSF TR08. 

 The intoPIX SMPTE 2110-22 Sub-system IP-cores are ideal to enable any existing SMPTE ST 2110 'uncompressed' FPGA video design to rapidly support SMPTE ST 2110-22 "compressed video" , as a almost 'plug and play' solution. Moreover, it can easily integrates with 2110 cores available from third party IP providers.

Integration of the intoPIX Sub-System 2110-22 IP-cores (Design with the IPX-TICO-XS ENC/DEC & IPX-RTP-XS-TX/RX cores)


  • ISO/IEC 21122のIETF RTP Payload Formatに準拠したRTPのパケット化とデパケット化 (RFC 9134 / JPEG XS) および VSF TR08勧告事項に準拠しています。
  • Handles the complete conversion of uncompressed video to SMPTE2110-22 JPEG XS RTP packets when combined with TicoXS / TicoXS FIP encoder/decoder IP-cores
  • JPEG XS Part3 ビデオサポート ボックスとカラー指定ボックスの生成と抽出を含む、コーデックとパケット化設定のための包括的なソフトウェアドライバ
  • A SMPTE 2110-22 Sub-system IP-core that is easy to integrate with existing and third party SMPTE 2110 FPGA design (including Adeas / Nextera, Macnica)  
  • VSF TR08と完全互換(VSF主催の相互接続試験にて、intoPIXのZCU106 ST2110-22 Demoで試験済み)。 
  • (オプション) ・intoPIXのAES 暗号化対応セキュアな RTP ビデオ伝送用IPコア



Resources for Intel or AMD-Xilinx FPGAs can be provided on request.

トライアルを依頼する: 4K SMPTE 2110-22 over IPデザイン例


TicoXS FIP エンコーダ/デコーダIPコア